Validating H.264 Video Cores

The massive size of video images usually means they can take you several days to validate. Simulating a frame of D1 (720 x 480) resolution video stream can take up to 10 million cycles – and that's just one frame. In validating H.264 codecs, you probably have to simulate hundreds of conformance streams, each containing multiple frames. The raw power needed to compute all these streams is beyond what your design team probably has. But you can resolve this validation nightmare by bringing hardware and software together earlier in the design cycle, thus simplifying development and accelerating your time to market.

Test Software and Hardware Together

A soft-emulation prototype such as EVE's ZeBu, which combines a prototyping board with a hardware emulator and a software debugger, brings hardware and software designs together so that your teams can see the full design picture. This big-picture view eliminates finger pointing and extended back-and-forth discussion between the two teams, which can derail your design schedule when emulation errors occur during debugging.

Because it's a common reference platform – and a fast one – ZeBu lets you sync up your software and hardware designs and increase your confidence that H.264 codecs are working together. Out of the gate, EVE client company Tensilica wrote its proprietary processor interface transactor in two weeks – without taking the time to design and construct an FPGA prototype board.

During H.264 codec testing, ZeBu lets Tensilica hardware and software designers cooperate because it presents a familiar interface for both teams. Software engineers can use their favorite C-code debugger. Hardware engineers emulate the board at the cycle level, control its logic and even stop and restart hardware emulation as needed.

Skip the FPGA Prototype

By communicating with the software, ZeBu's hardware transactor lets you catch each image H.264 frame in real time and eliminates the time-consuming development of an FPGA prototype. Not only does this cooperative simulation approach let you find the software and hardware bugs you know are in your design, but it finds bugs caused by the interaction of the two – bugs you couldn't know about otherwise.

"Even if we had the time to set up the FPGA board for verification, we would still prefer ZeBu because of its nice debugging features and transactor support," said Sadik Ezer, senior verification engineer for Tensilica. In addition, the Tensilica design team was able to use ZeBu to find numerous software bugs in their codec binaries. They also found a few hardware bugs, including some clock-gating bugs that RTL simulation didn't catch.

To learn more details about Tensilicia's H.264 video core validation, visit EVE's Web site and watch the video testimonial from Tensilica.